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Via hole design in high speed PCB

Via hole design in high speed PCB

In the design of high speed PCB, seemingly simple via hole often brings great negative effects to circuit design. In order to reduce the adverse effects caused by parasitic effects of through-hole, we should try our best to achieve,

1, In terms of cost and signal quality, choose the reasonable size of via hole size. For example, for the design of 6-10 layer Memory Module PCB, choose 10/20mil (Drilling/pad) hole is better, for some high-density and small size of the board, you can also try to use the 8/18mil hole. Under the current technical conditions, it is difficult to use a smaller size of the hole. For the power supply or ground via hole can be considered to use a larger size to reduce the impedance.

2, Using thinner PCB is beneficial to reduce the two parasitic parameters of via hole

3, The signal line on the PCB board should try best not to change the layer, that is to say, try not to use unnecessary holes.

4, The power and ground pins should be near the hole. The lead between the hole and the pin is shorter is the better, because they will lead to an increase in inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance.

5, Place some ground vias near the vias of the signal change layer, so as to provide the nearest loop for the signal. Even some extra series of grounding holes can be placed on the PCB board.

Certainly, it needs to be flexible in design. The hole model discussed before is in the situation that each layer has pads, and sometimes we can reduce or even remove the pads of some layers. Especially in the case of very large hole density, it may cause a broken slot in the copper layer to form a partition circuit. In addition to moving the hole position to solve this problem, we can also consider to reduce the size of the hole pads in the copper layer.

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